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Frequency margining is greatly simplified using this method as a result of the MultiSynth’s fractional divider value could be changed dynamically such that the clock output produces a variable clock source. All frequency transitions are continuous and glitchless. Frequency transitions as small as 1 kHz and as massive as 10 MHz are possible utilizing this architecture. The frequency of every output clock could be changed dynamically for any frequency as much as 350 MHz. Consequently, standalone crystal oscillators historically used for board-stage test will be eradicated.
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